1. Technical Field
The disclosure relates generally to integrated circuit (IC) chip fabrication, and more particularly, to a test structure for electromigration analysis and a related method.
2. Background Art
Electromigration is a reliability concern for copper (Cu) interconnects, in which atoms migrate in the direction of the electron flow, eventually leading to void formation at the cathode end of a line and extrusion formation at the anode end of the line. That is, the electron flow is out of the cathode end and into the anode end of the line.
A dual damascene process is often used to fabricate copper interconnects, such that the vias and lines are formed in the same process step for cost improvements. In most cases, failure is caused by void formation in the vias or lines, and is detected as an increase in resistance of the structure. The failure times along with the corresponding cumulative distribution function (CDF) values are typically fitted to a lognormal failure distribution in order to determine the statistical parameters for the test structure such as median time to failure (T50) and standard deviation (sigma (□)).
A large sample size is required to increase the level of confidence in the statistical parameters. In electromigration, different types of distributions like bimodal and three-parameter distribution, have been used to determine the interconnect reliability. These distributions require more parameters than the usual two and hence even larger sample size. As experiments are conducted under highly accelerated conditions, small errors in parameter estimation can lead to incorrect reliability projections at use conditions. However, sample sizes are limited by the available time and resources (ovens, packages, etc.).